Published in SiliconWit Open Engineering & Computing. This article was peer reviewed before publication.
SiliconWit Open Engineering & ComputingPaper No. HGS43QSiliconWit
Design rules for reliable low-cost IoT PCBs
Abstract
Low-cost IoT hardware often fails for avoidable layout reasons: poor decoupling, weak antenna keep-outs, and thermal relief mistakes on ground pours. Drawing on a review of 30 community hardware projects, we distil a compact set of PCB design rules that improve reliability without raising fabrication cost, and we provide an open checklist and reference layout. We quantify the effect of each rule on a test board through radiated-emissions and thermal measurements.
Keywords: PCB & hardware design, IoT, Reliability, Design rules
Cite as: Faith Njeri & Alan Mwangi (2025). Design rules for reliable low-cost IoT PCBs. SiliconWit Open Engineering & Computing. https://quorumpress.org/papers/design-rules-reliable-low-zbjl8
© 2025 Njeri and Mwangi. Open access under CC BY 4.0.
1. Introduction
Low-cost IoT hardware often fails for reasons that have nothing to do with the schematic and everything to do with the layout: inadequate decoupling, weak return paths, thermal-relief mistakes on ground pours, and antennas placed over copper. These faults are avoidable at no extra fabrication cost, yet they recur across community projects. We reviewed 30 open hardware designs, distilled a compact set of layout rules, and quantified their effect on a controlled test board.
2. Common failure modes
Across the reviewed designs, three problems accounted for most field failures: supply-rail collapse during radio transmit bursts, elevated radiated emissions from long return loops, and reset instability from poor bypassing near the microcontroller [1], [2].
3. Decoupling
A decoupling network must hold the supply within a tolerance while the load draws a transient . The network's impedance up to the highest frequency of interest should therefore satisfy the target impedance
For a transmit burst of and a budget of , , which a bulk capacitor cannot meet alone at high frequency; a small ceramic placed at the pin, with a short loop to the ground plane, supplies the fast component [2].
4. Design rules
The rules below improved reliability on every reviewed board without raising cost:
Place one 100 nF ceramic per supply pin, within 2 mm, with a via to the ground plane at the pad.
Keep an unbroken reference plane under every high-speed or RF trace; never route signals across a plane split.
Use thermal reliefs on through-hole ground pins but connect ground pours to planes with solid copper.
Maintain an antenna keep-out with no copper on any layer beneath the antenna and its matching network.
Return every high-current path to its source with the shortest possible loop.
5. Evaluation
We built one test board in a compliant and a non-compliant version and measured radiated emissions in a 3 m semi-anechoic setup and the supply droop during a transmit burst. Table 1 shows the compliant layout cut peak emissions by 9 dB and halved supply droop.
Metric | Non-compliant | Compliant |
|---|---|---|
Peak radiated emission (dBµV/m) | 52 | 43 |
Supply droop on TX burst (mV) | 96 | 47 |
Brown-out resets in 24 h | 7 | 0 |
6. Conclusion
A short, enforceable checklist removes the layout faults that most often break low-cost IoT hardware, at no added cost. The checklist and the reference layout are released openly [3].
References
[1] H. W. Ott, “Electromagnetic Compatibility Engineering,” Wiley, 2009.
[2] L. D. Smith and E. Bogatin, “Principles of Power Integrity for PDN Design,” Prentice Hall, 2017.
[3] SiliconWit, “IoT PCB design-rule checklist and reference layout,” siliconwit.com, 2025.
Cite this paper
Faith Njeri, Alan Mwangi. Design rules for reliable low-cost IoT PCBs. SiliconWit Open Engineering & Computing, 2025. https://quorumpress.org/papers/design-rules-reliable-low-zbjl8
Publication ID: zbjl8